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? semiconductor components industries, llc, 2013 september, 2013 ? rev. 10 1 publication order number: ncp367/d ncp367 battery charge front-end protection, usb and ac/dc supply compliant ncp367 is a charge path protection device which allows disconnecting the systems from its output pin in case wrong charging conditions are detected. the system is positive overvoltage protected up to +30 v. thanks to a very low current consumption, the usb charge is compatible with this integrated component. this device uses internal pmos fet, making external devices unnecessary, which reduces the system cost and pcb area of the application board. first, ncp367 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold. additional overcurrent protection function allows turning off internal pmos fet when the charge current exceeds current limit, which is externally selectable. the current limit value can be modified with control logic pin to divide it by internal gain, allowing usb 100 ma/500 ma charging or usb/wall adapter charging up to overcurrent threshold. at the same time, li ion battery voltage is continuously monitored, providing more safety during the charge. thermal shutdown protection is also available. ncp367 provides a negative going flag (flag ) output, which alerts the system that a fault has occurred as overvoltage (power supply or battery voltage), overcurrent or thermal event. in addition, the device has esd ? protected input (15 kv air) when bypassed with a 1 f or larger capacitor. features ? overvoltage protection up to + 30 v ? fast turn off time ? very low current consumption/usb compliant ? li ion battery voltage monitoring ? overvoltage lockout (ovlo) ? undervoltage lockout (uvlo) ? overcurrent protection externally adjustable (ocp) up to 2.8 a ? thermal shutdown ? shutdown en and gain input pins ? soft ? start to eliminate inrush current ? alert flag output ? compliance to iec61000 ? 4 ? 2 (level 4) 8 kv (contact), 15 kv (air) ? esd ratings: machine model = b esd ratings: human body model = 2 ? 8 lead dfn 2.2x2 mm package ? these are pb ? free devices typical application ? usb devices ? mobile phones ? peripheral ? personal digital applications ? mp3 players http://onsemi.com q marking diagram xx = specific device code m = date code = pb ? free device xx m 1 dfn8 mu suffix case 506bp (*note: microdot may be in either location) pin assignment in vbat nc ilim en gs flag gnd 1 2 3 4 8 7 6 5 (top view) out 1 8 see detailed ordering, marking and shipping information in the package dimensions section on page 12 of this data sheet. ordering information
ncp367 http://onsemi.com 2 wall adapter / usb li+ battery dcdc mcu battery charger ncp367 9 ilim 5 4 6 7 gnd 8 out 2 in 1 figure 1. typical application circuit 1 f en flag vbat gs 10 k 1 f 100 k b+ figure 2. functional block diagram vin/vusb ilim gs out flag en pin ovlo uvlo soft ? start logic + timer driver i limit + gain 1/2.75 ldo vref thermal shutdown gnd vbat 4.35 v
ncp367 http://onsemi.com 3 pin function description pin name type description 1 in power input v oltage pin. this pin is connected to the power supply: wall adapter or usb. a 1 f low esr ceramic capacitor, or larger, must be connected between this pin and gnd. ? gap voltage reference, to limit the overcurrent, across internal pmosfet, from in to out. a 1% tolerance, or better, resistor shall be used to get the highest accuracy of the overcurrent limit. 5 en input enable mode pin. the device enters in shutdown mode when this pin is tied to a high level. in this case the output is disconnected from the input. the state of this pin does not have an impact on the fault detection of the flag pin. 6 gs input gain select pin. when the gs pin is tied to 0 level, the overcurrent threshold is defined by ilimit set- ting. see logic table. when gs pin is tied to high, the overcurrent threshold is set to ilimit/gs 7 flag output fault indication pin. this pin allows an external system to detect fault condition. the flag pin goes low when input voltage is below uvlo threshold, exceeds ovlo threshold, charge current from wall adapter to battery exceeds programmed current limit, li ion battery voltage (4.3 v) is exceeded or in- ternal temperature exceeds thermal shutdown limit. since the flag pin is open drain functionality, an external pull ? up resistor to vbattery must be added (10 k minimum value). 8 gnd power ground. 9 out output output voltage pin. this pin follows in pin when ?no input fault? is detected. the output is disconnected from the vin power supply when voltage, current or thermal fault events are detected. a 1 f low esr ceramic capacitor, or larger, must be connected between this pin and gnd. note: pin out provided for concept purpose only and might change in the final product maximum ratings rating symbol value unit minimum v oltage (in to gnd) vmin in ? 0.3 v minimum v oltage (all others to gnd) vmin ? 0.3 v maximum voltage (in to gnd) vmax in 30 v maximum voltage (all others to gnd) vmax 7.0 v maximum dc current from vin to vout (pmos) imax 3.4 a thermal resistance, junction ? to ? air (without pcb area) r ja 190 c/w operating ambient temperature range t a ? 40 to +85 c storage temperature range t stg ? 65 to +150 c junction operating temperature t j 150 c esd withstand v oltage (iec 61000 ? 4 ? 2) human body model (hbm), model = 2 (note 1) machine model (mm) model = b (note 2) vesd 15 air, 8.0 contact 2000 200 kv v v latchup lu class 1 ? moisture sensitivity msl level 1 ? stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. human body model, 100 pf discharged through a 1.5 k resistor following specification jesd22/a114. 2. machine model, 200 pf discharged through all pins following specification jesd22/a115.
ncp367 http://onsemi.com 4 electrical characteristics ? ncp367opmuea (min/max limits values ( ? 40 c < t a < +85 c) and v in = +3.5 v. typical values are t a = +25 c, unless otherwise noted.) characteristic symbol conditions min typ max unit input voltage range v in 1.2 28 v undervoltage lockout threshold uvlo v in falls down uvlo threshold 1.75 1.85 1.9 v undervoltage lockout hysteresis uvlo hyst 60 100 mv overvoltage lockout threshold ncp367opmuea ovlo v in rises up ovlo threshold 3.65 3.8 3.95 v overvoltage lockout hysteresis ovlo hyst 45 150 mv vin versus vout resistance r ds(on) enable mode, load connected to v out 50 100 m supply quiescent current idd no load 42 130 a disable mode idd dis en = 1.2 v 35 110 a overcurrent threshold ncp367opmuea i ocp en = low, load connected to v out ,, r ilim = 0 , 1 a/ s, gs = 0.4 v 2.30 2.85 3.40 a overcurrent response i reg 1 a/ s, gs = low, i lim = 1.51 a 5.0 % current limit gain ncp367opmuea gs value gs = 1.2 v 2.55 battery overvoltage threshold ov bat 0 c to 85 c 4.3 4.35 4.4 v battery overvoltage hysteresis ov hys 0 c to 85 c 100 150 200 mv v bat pin leakage vbat leak 20 na v bat deglitch time vbat deg v bat > ov bat 0.2 2.0 4.0 ms flag output low voltage vol flag v in > ovlo sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5 v 10 na en voltage high v ih 1.2 v en voltage low v il 0.4 v en leakage current en leak 200 na gs voltage high v ih 1.2 v gs voltage low v il 0.4 v gs leakage current gs leak 200 na timings start up delay t on from v in > uvlo to v out = 0.8xv in 15 30 45 ms flag going up delay t start from v out > 0.2xv in to flag = 1.2 v 15 30 45 ms rearming delay t rearm ocp active 15 30 45 ms overcurrent regulation time t reg ocp active 1.2 1.8 3.0 ms output turn off time t off from v in > ovlo to v out 0.3 v, v in increasing from 3.5 v to 6.5 v at 3 v/ s. 1.5 5.0 s alert delay t stop from v in > ovlo to flag 0.4 v, (see figure 16) v in increasing from 3.5 v to 6.5 v at 3 v/ s 1.5 s disable time t dis from en 0.4 to 1.2 v to v out 0.3 v 3.0 s thermal shutdown t emperature t sd 150 c thermal shutdown hysteresis ts d hyst 30 c note: electrical parameters are guaranteed by correlation across the full range of temperature.
ncp367 http://onsemi.com 5 electrical characteristics ? ncp367dpmueb (min/max limits values ( ? 40 c < t a < +85 c) and v in = +4.0 v. typical values are t a = +25 c, unless otherwise noted.) characteristic symbol conditions min typ max unit input voltage range v in 1.2 28 v undervoltage lockout threshold uvlo v in falls down uvlo threshold 1.75 1.85 1.9 v undervoltage lockout hysteresis uvlo hyst 60 100 mv overvoltage lockout threshold ncp367dpmueb ovlo v in rises up ovlo threshold 4.38 4.54 4.7 v overvoltage lockout hysteresis ovlo hyst 45 100 mv vin versus vout resistance r ds(on) v in = 5 v, enable mode, load connected to v out 50 100 m supply quiescent current idd no load 42 130 a disable mode idd dis en = 1.2 v 35 110 a overcurrent threshold ncp367dpmueb i ocp v in = 4.3 v, en = low, load connected to v out ,, r ilim = 0 , 1 a/ s, gs = 0.4 v 1.25 1.45 1.80 a overcurrent response i reg 1 a/ s, gs = low, i lim = 1.51 a 5.0 % current limit gain ncp367dpmueb gs value gs = 1.2 v 2.77 battery overvoltage threshold ov bat v in = 4.2 v, 0 c to 85 c 4.3 4.35 4.4 v battery overvoltage hysteresis ov hys v in = 4.2 v, 0 c to 85 c 100 160 200 mv v bat pin leakage vbat leak v in = 4.0 v, 20 na v bat deglitch time vbat deg v bat > ov bat 0.2 2.0 4.0 ms flag output low voltage vol flag v in > ovlo sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5 v 10 na en voltage high v ih 1.2 v en voltage low v il 0.4 v en leakage current en leak 200 na gs voltage high v ih 1.2 v gs voltage low v il 0.4 v gs leakage current gs leak 200 na timings start up delay t on from v in > uvlo to v out = 0.8xv in 15 30 45 ms flag going up delay t start from v out > 0.2xv in to flag = 1.2 v 15 30 45 ms rearming delay t rearm ocp active 15 30 45 ms overcurrent regulation time t reg ocp active 1.2 1.8 3.0 ms output turn off time t off from v in > ovlo to v out 0.3 v, v in increasing from 4 v to 7 v at 3 v/ s. 1.5 5.0 s alert delay t stop from v in > ovlo to flag 0.4 v, (see figure 16) v in increasing from 4 v to 7 v at 3 v/ s 1.5 s disable time t dis from en 0.4 to 1.2 v to v out 0.3 v 3.0 s thermal shutdown t emperature t sd 150 c thermal shutdown hysteresis ts d hyst 30 c note: electrical parameters are guaranteed by correlation across the full range of temperature.
ncp367 http://onsemi.com 6 electrical characteristics ? other ovlo version (min/max limits values ( ? 40 c < t a < +85 c) and v in = +5.0 v. typical values are t a = +25 c, unless otherwise noted.) characteristic symbol conditions min typ max unit input voltage range v in 1.2 28 v undervoltage lockout threshold uvlo v in falls down uvlo threshold 1.75 1.85 1.9 v undervoltage lockout hysteresis uvlo hyst 80 100 mv overvoltage lockout threshold ncp367dpmuec ncp367dpmuee ncp367dpmuel ncp367opmueo ovlo v in rises up ovlo threshold 5.64 5.85 6.60 6.90 5.85 6.07 6.84 7.20 6.05 6.28 7.08 7.50 v overvoltage lockout hysteresis ovlo hyst 100 150 mv vin versus vout resistance r ds(on) v in = 5 v, enable mode, load connected to v out 50 100 m supply quiescent current idd no load 42 130 a disable mode idd dis en = 1.2 v 40 110 a overcurrent threshold ncp367dx ncp367ox i ocp v in = 5 v, en = low, load connected to v out ,, r ilim = 0 , 1 a/ s, gs = 0.4 v 1.25 2.30 1.51 2.85 1.80 3.40 a overcurrent response i reg 1 a/ s, gs = low, i lim = 1.51 a 5.0 % current limit gain ncp367d x ncp367o x gs value gs = 1.2 v 2.70 2.55 battery overvoltage threshold ov bat 0 c to 85 c 4.3 4.35 4.4 v battery overvoltage hysteresis ov hys 0 c to 85 c 100 150 200 mv v bat pin leakage vbat leak 20 na v bat deglitch time vbat deg v bat > ov bat 0.2 2.0 4.0 ms flag output low voltage vol flag v in > ovlo sink 1 ma on flag pin 400 mv flag leakage current flag leak flag level = 5 v 10 na en voltage high v ih v in from 3.3 v to 5.25 v 1.2 v en voltage low v il v in from 3.3 v to 5.25 v 0.4 v en leakage current en leak en = 5.5 v or gnd 200 na gs voltage high v ih v in from 3.3 v to 5.25 v 1.2 v gs voltage low v il v in from 3.3 v to 5.25 v 0.4 v gs leakage current gs leak en = 5.5 v or gnd 200 na timings start up delay t on from v in > uvlo to v out = 0.8xv in 15 30 45 ms flag going up delay t start from v out > 0.2xv in to flag = 1.2 v 15 30 45 ms rearming delay t rearm ocp active 15 30 45 ms overcurrent regulation time t reg ocp active 1.2 1.8 3.0 ms output turn off time t off from v in > ovlo to v out 0.3 v, v in increasing from 5 v to 8 v at 3 v/ s. 1.5 5.0 s alert delay t stop from v in > ovlo to flag 0.4 v, (see figure 16) v in increasing from 5 v to 8 v at 3 v/ s 1.5 s disable time t dis from en 0.4 to 1.2 v to v out 0.3 v 3.0 s thermal shutdown t emperature t sd 150 c thermal shutdown hysteresis ts d hyst 30 c note: electrical parameters are guaranteed by correlation across the full range of temperature.
ncp367 http://onsemi.com 7 typical operating characteristics vin vout /flag vin vout v in v out /flag t on t start /flag vout vin t off t stop /flag v out v in t on t start /flag v in /flag figure 3. hot plug ? in from 0 to 5 v, t on and t start figure 4. overvoltage from 5 to 8 v, t off and t stop figure 5. retrieve normal operation, t on and t start figure 6. overvoltage from 0 to 10 v figure 7. battery overvoltage, deglitch time v in v in v out /flag v in v out /flag v bat vbat deg
ncp367 http://onsemi.com 8 typical operating characteristics figure 8. uvlo and hysteresis figure 9. ovlo and hysteresis vs. temperature (5.6 v version) figure 10. v bat threshold and hysteresis vs. temperature figure 11. v bat pin leakage vs. temperature 4.40 0 ? 50 50 100 125 ov bat (v) temperature ( c) 4.35 4.30 4.25 4.20 4.15 4.10 1.92 0 ? 50 50 100 125 uvlo (v) temperature ( c) 1.90 1.88 1.86 1.84 1.82 1.80 uvlo + hysteresis 2.00 uvlo 1.94 1.96 5.62 0 ? 50 50 100 125 ovlo (v) temperature ( c) 5.60 5.58 5.56 5.54 5.52 5.50 5.64 5.66 0 ? 50 50 100 125 vbat leak (na) temperature ( c) 20 15 10 5 0 1.98 25 ? 25 75 25 ? 25 75 ovlo 25 ? 25 75 25 ? 25 75 ovlo ? hysteresis
ncp367 http://onsemi.com 9 application information operation the ncp367 is an i ntegrated ic which of fers a complete protection of the portable devices during the li ion battery charge. first, the input pin is protected up to +30 v, protecting the down stream system (charger, transceiver, system...) against the power supply transients such as inrush current or defective functionality. additional protection level is offered with the overcurrent block which eliminates current peak or opens the charge path if an overcurrent default appears. more of that, the battery voltage is monitored all along the input power supply is connected, allowing to open charge path if li ion battery voltage exceeds 4.3 v, caused by cccv charger or battery pack fault. the integrated pass element (pmos fet) is sized to support very high charge dc current up to 2.3 a. the overcurrent threshold can be externally adjusted with a pull ? down resistor and gain select pin is available to divide current limit threshold with internal fixed gain. allowing to adjust with logic pin the overcurrent threshold if usb/500 ma or wa/1.5 a is detected, without changing r ilim resistor, in example. undervoltage, overvoltage, overcurrent and thermal faults are signalized thanks to the open drain flag pin, by pulling its down. undervoltage lockout (uvlo) to ensure proper operation under any conditions, the device has a built ? in undervoltage lock out (uvlo) circuit. during vin positive going slope, the output remains disconnected from input until vin voltage is above 1.85 v plus hysteresis nominal. this circuit has a 80 mv hysteresis to provide noise immunity to transient condition. overvoltage lockout (ovlo) to protect connected systems on vout pin from overvoltage, the device has a built ? in overvoltage lock out (ovlo) circuit. during overvoltage condition, the output remains disabled as long as the input voltage exceeds this threshold. flag output is tied to low as long as vin is higher than ovlo. this circuit has a 100 mv hysteresis to provide noise immunity to transient conditions . flag output ncp367 provides a flag output, which alerts external systems that a fault has occurred. this pin is tied to low as soon as the ovlo, ov bat , i ocp or internal temperature thresholds are exceeded and remains low until between minimum driving voltage and uvlo threshold. when vin level recovers normal condition, flag is held high. the pin is an open drain output, thus a pull up resistor (typically 1 m ? minimum 10 k ) must be provided to v cc . flag pin is an open drain output, which is able to support 1 ma maximum. en input to enable normal operation, the en pin shall be forced to low or connected to ground. a high level on the pin, disconnects out pin from in pin. en does not overdrive a uvlo or ovlo fault. overcurrent protection (ocp) this device integrates the overcurrent protection function, from wall adapter to battery. that means the current across the internal pmos is regulated and cut when the value, set by external rsel resistor, exceeds i lim longer than t reg . an internal resistor is placed in series with the pin allowing to have a maximum ocp value when i lim pin is directly connected to gnd. by adding external resistors in series with i lim and gnd, the ocp value is decreased. an additional logic pin, gs (gain select), is very useful in case of different charge rate is necessary (wall adapter and usb, for example). by setting gs to 0.4 v, overcurrent thresholds are depending on r select resistor, which is connect between pin 4 and gnd. when the gs pin is tied to 1.2 v (high logic level) the preselected current limit is divided by 2.75. due
ncp367 http://onsemi.com 10 to this option, both fast charge or usb charge are authorized with the same device. figure 12. i ocp versus r lim , gs = low and high, 1.5 a version 0 500 1000 1500 0 100 200 300 400 500 600 700 800 rilim(k ) iocp (ma) gs = high gs = low 0 1 2 3 0 100 200 300 400 500 600 700 800 gs = low gs = high iocp (ma) figure 13. over current threshold versus r limit 2.85 a version rilim (k ) typical r lim calculation is following: ncp367dxmuxxtbg r lim (k ) = 249 / i ocp ? 165 ncp367oxmuxxtbg r lim (k ) = 532 / i ocp ? 180 during overcurrent event, charge area is opened and flag output is tied to low, allowing the controller to take into account the fault event and then open the charge path. at power up (accessory is plugged on input pins), the current is limited up to i lim during 1.8 ms (typical), to allow capacitor charge and limit inrush current. if the i lim threshold is exceeded over 1.8 ms, the device enter in ocp burst mode until the overcurrent event disappears. v bat sense the connection of the v bat pin to the positive connection of the li ion battery pack allows preventing overvoltage transient, greater than 4.35 v. in case of wrong charger conditions, the pmos is then opened, eliminating battery pack over voltage which could create safety issues and temperature increasing. the 4.35 v comparator has a 150 mv built ? in hysteresis. more of that, deglitch function of 2 ms is integrated to prevent voltage transients on the battery voltage. if the battery over voltage condition exceeds deglitch time, the charge path is opened and flag pin is tied to low level until the v bat is greater than 4.35 v ? hysteresis. at wall adapter insertion, and if the battery is fully charged, v bat comparator stays locked until battery needs to be recharged (4.2 v typ ? 4.1 v min). a serial resistor has to be placed in series with vbat pin and battery connection, with a 200 k recommended value. pcb recommendations the ncp367 integrates low r ds(on) pmos fet, nevertheless pcb layout rules must be respected to properly evacuate the heat out of the silicon. the dfn pad1 corresponds to the pmos drain so must be connected to out plane to increase the heat transfer. of course, in any case, this pad shall be not connected to any other potential. following figure shows package thermal resistance of a dfn 2.2x2 mm.
ncp367 http://onsemi.com 11 80 100 120 140 160 180 200 220 240 0 100 200 300 400 500 600 700 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 max power (w) theta ja curve with pcb cu thk 1.0 oz theta ja curve with pcb cu thk 2.0 oz power curve with pcb cu thk 2.0 oz power curve with pcb cu thk 1.0 oz t_ambient 25 c copper hea t spreader area (mm 2 ) theta ja ( c/w) figure 14. internal pmos fet ncp367 includes an internal pmos fet to protect the systems, connected on out pin, from positive over ? voltage. regarding electrical characteristics, the r ds(on) , during normal operation, will create low losses on v out pin versus v in , due to very low r ds(on) . figure 15. typical r ds(on) versus temperature 20 30 40 50 60 70 80 90 100 ? 50 ? 25 0 25 50 75 100 125 r ds(on) (m ) temperature ( c) esd tests ncp367 fully support the iec61000 ? 4 ? 2, level 4 (input pin, 1 f mounted on board). that means, in air condition, vin has a 15 kv esd protected input. in contact condition, vin has 8 kv esd protected input. please refer to figure 16 to see the iec 61000 ? 4 ? 2 electrostatic discharge waveform. figure 16. iec 61000 ? 4 ? 2 electrostatic discharge
ncp367 http://onsemi.com 12 ordering information device marking package shipping ? ncp367dpmuectbg dc dfn8 (pb ? free) 3000 / t ape & reel ncp367dpmueetbg de dfn8 (pb ? free) 3000 / tape & reel NCP367DPMUELTBG dl dfn8 (pb ? free) 3000 / tape & reel ncp367opmueotbg p3 dfn8 (pb ? free) 3000 / tape & reel ncp367opmueatbg ea dfn8 (pb ? free) 3000 / tape & reel ncp367dpmebtbg pe dfn8 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. selection guide the ncp367 can be available in several undervoltage and overvoltage thresholds versions. part number is designated as follows: a ncp367xxmuxxtbg bc d code contents a overcurrent threshold a = d: 1.51 a a = o: 2.85 a b v bat voltage b: p = 4.36 v (additional thresholds available for a wide lithium ion material range) c uvlo typical threshold c: e = 1.85 v d ovlo typical threshold (additional thresholds available) d: c = 5.85 v d: e = 6.07 v d: l = 6.85 v d: o = 7.20 v d: a = 3.80 v d: b = 4.54 v
ncp367 http://onsemi.com 13 package dimensions ? ? ? ? ?? ?? ?? ?? ? ? ? ? ?? ?? ?? ?? case 506bp issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 8x 0.10 b 0.05 a c c k 8x note 3 2x 0.10 c pin one reference top view 2x 0.10 c 9x a a1 (a3) 0.05 c 0.05 c c seating plane side view l 8x 1 4 5 8 8x 0.28 2.50 1.15 1 0.45 0.50 pitch 1.63 8x dimensions: millimeters *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* dim a min typ millimeters 0.80 --- a1 0.00 --- a3 0.20 ref b 0.20 --- d 2.00 bsc d2 1.43 --- e 2.20 bsc 1.05 --- e2 e 0.50 bsc 0.20 0.22 k 0.25 --- l --- --- l1 l1 detail a l alternate terminal constructions l ??? ??? 0.10 b a c 0.10 b a c e/2 max 1.00 0.05 0.30 1.53 1.25 0.30 0.35 0.15 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. sc illc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circui t, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data she ets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for e ach customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designe d, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such u nintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this l iterature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp367/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative

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